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HS

Hideki Saito

Intel
Principal Engineer
15 years focused on shared memory parallelism followed by 10 years focused on vectorization for IA32/Intel64 SIMD extensions. SPEC HPG rep from Intel (2001-2007), involved in the development of SPEC OMP2001, HPC2002, and MPI2007 benchmarks.
Thursday, November 3
 

8:00am PDT

Registration & Breakfast 0 - Lobby Area

9:00am PDT

Welcome 1 - General Session (Rm LL20ABC)Tanya Lattner

9:15am PDT

ORC -- LLVM's Next Generation of JIT API 1 - General Session (Rm LL20ABC)Lang Hames

10:15am PDT

BREAK 0 - Lobby Area

10:30am PDT

Intrinsics, Metadata, and Attributes: The story continues! 1 - General Session (Rm LL20ABC)Hal Finkel

11:15am PDT

Scalable Vectorization for LLVM 2 - Technical Talk (Rm LL21AB)Amara Emerson • Graham Hunter

12:00pm PDT

Extending LoopVectorizer towards supporting OpenMP4.5 SIMD and outer loop auto-vectorization 2 - Technical Talk (Rm LL21AB)Hideki Saito

12:45pm PDT

LUNCH 0 - Lobby Area

2:15pm PDT

Loop Passes: Adding new features while reducing technical debt 1 - General Session (Rm LL20ABC)Michael Zolotukhin

3:00pm PDT

GVN-Hoist: Hoisting Computations from Branches 1 - General Session (Rm LL20ABC)Aditya Kumar • Sebastian Pop

3:45pm PDT

BREAK 0 - Lobby Area

4:15pm PDT

Hackers Lab 4 - Hackers Lab (Rm LL21EF)

5:00pm PDT

Representing composite SIMD operations in LLVM-IR 3 - BoF (Rm LL21CD)Elena Demikhovsky
 
Friday, November 4
 

9:00am PDT

ThinLTO: Scalable and Incremental LTO 1 - General Session (Rm LL20ABC)Mehdi Amini • Teresa Johnson

10:00am PDT

Where are my variables? Debug info for optimized code 3 - BoF (Rm LL21CD)Adrian Prantl

10:45am PDT

BREAK 0 - Lobby Area

11:15am PDT

Compiler-assisted Performance Analysis 2 - Technical Talk (Rm LL21AB)Adam Nemet

12:00pm PDT

Hackers Lab 4 - Hackers Lab (Rm LL21EF)

12:45pm PDT

LUNCH 0 - Lobby Area

2:15pm PDT

PIR - A parallel LLVM-IR 3 - BoF (Rm LL21CD)Johannes Doerfert • Simon Moll

3:00pm PDT

Reducing Code Size Using Outlining 1 - General Session (Rm LL20ABC)Jessica Paquette

3:45pm PDT

POSTER SESSION 0 - Lobby AreaGheorghe-Teodor Bercea • Utpal Bora • Jia Chen • Joshua Cranmer • Bianca-Cristina Cristescu • Sandeep Dasgupta • Zhengyang Liu • Simon Moll • Matthias Reisinger • Nandini Singhal • Nathan Wilson

4:45pm PDT

Polly Loop Optimization and Accelerator Compilation 3 - BoF (Rm LL21CD)Tobias Grosser